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Xilinx unveils building blocks for PCI Express Gen3

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CIOL Bureau
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CALIFORNIA, USA: Xilinx has introduced building blocks for designs using the Virtex-7 FPGA integrated block for PCI Express x8 Gen3 with DDR3 external memory. Users can design systems that meet high system bandwidth requirements needed in communications, storage, server applications using Xilinx’s integrated blocks for the PCI Express Gen3 standard along with support for 1866Mb/s high speed memory interfaces in mid-speed grade devices.

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It has got 40 per cent performance merit over other memory solutions. Users can enhance their productivity by offering maximum memory data rates in its mid-speed grade devices as well as built-in capabilities in its Virtex-7 XT devices for single-root I/O virtualisation and multi-function end points to address the emerging needs in Data Centre and cloud computing.

Customers have the components they need to implement high-performance PCI Express x8 Gen3-based designs at the lowest BOM cost by using a mid-speed grade device. In addition, Xilinx enables the highest productivity levels with industry-leading transceiver technology that provides automated tuning capabilities to quickly bring up a functioning link, including auto-adaptive Decision Feedback Equalisation (DFE).

This dramatically accelerates development time by simplifying the set up and use of the high-speed serial transceivers that support the PCI Express Gen3 standard,” said Ketan Mehta, Xilinx PCI Express Product Manager.

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Virtex-7 XT and HT FPGAs are the first generation of Xilinx All Programmable devices. It integrates hard IP cores for the PCI Express Gen3 standard. Both Kintex-7 and Virtex-7 FPGAs features 1866Mb/s DDR3 external memory. 

This enhances the PCI Express system throughput. PCI Express Gen3 video demonstrates the integrated block operating on a Virtex-7 X690T FPGA with an off-the-shelf PCI Express Gen3 system.

For designs that do not use an integrated block for the PCI Express Gen3 standard, soft IP core support is available through Xilinx Alliance Programme members, including Northwest Logic and PLDA.

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