Xilinx ISE 9.2i reduces memory requirements, supports new OSs

SAN JOSE, CALIF: Xilinx Inc. recently announced the immediate availability of the ISE 9.2i (Integrated Software Environment) design tools, the latest release of its widely-used design solution.

Improvements in the ISE 9.2i release reduce memory requirements by an average of 27 percent, while providing expanded support for MS Windows Vista, Windows XP x64, and Red Hat Enterprise WS 5.0 32-bit and 64-bit OSs. To simplify multi-rate DSP designs with a large number of clocks typically found in wireless and video applications, the ISE 9.2i software features breakthrough advancements in place and route, and clock algorithms offering up to 15 percent performance advantage.

ISE 9.2i software is powered by Xilinx's latest SmartCompile technology, which cuts implementation runtimes by up to 6X, while maintaining exact design preservation of unchanged logic. The new release provides the most advanced design solution for the latest line of Xilinx 65nm Virtex-5 high-performance FPGAs and 90nm Spartan-3 generation high-volume FPGAs. Xilinx has been delivering benefits of 65nm FPGAs since May 2006 with production qualified devices available now.
Lower memory requirements
Through algorithmic improvements in memory usage, ISE 9.2i design tools radically improve utilization of computing resources, providing users with greater design flexibility. This reduction in memory usage enables users to design with higher density FPGAs with more widely available 32-bit version of Windows XP in lieu of the previously required 64-bit OS.

Bruce Talley, vice president of Design Software Division at Xilinx, said: "With broad availability of our feature-rich high-performance 65nm Virtex-5 FPGAs, customers are demanding more from their design platform. ISE 9.2i, which combines advanced tools like SmartCompile technology with better usage of their computing hardware, provides faster timing closure and higher quality of results for a better time-to-market solution."

Embedded processing and debug
Improvements in ISE 9.2i software permit greater flexibility for designs that leverage embedded processors. Tighter integration with Platform Studio (Xilinx integrated development environment for embedded design) allows embedded users improved access to the design closure tools residing within the ISE design environment.

The ISE 9.2i design suite is accompanied by the release of ChipScope Pro 9.2 debug and verification software. Available as an add-on option, the ChipScope Pro 9.2 solution reduces verification cycles by up to 50 percent. Also included is the newest release of the ChipScope Pro Serial IO Toolkit, providing simplified debugging of high-speed serial IO designs for Virtex-4 FX and Virtex-5 LXT and SXT FPGAs.