TSMC announces Open Innovation Platform

TAIPEI: Taiwan Semiconductor Manufacturing Company (TSMC) has announced its Open Innovation Platform (OIP) — a design enablement initiative that will help to accelerate time-to-market, improve return on design investment and reduce design infrastructure duplication — which now includes system-level design, analog/mixed-signal design and 2D/3D IC implementation.

Launched in 2008, TSMC's OIP includes a set of interoperable ecosystem interfaces, collaborative components and design flows. The platform initiative will extend to feature new collaborative ecosystem programs that focus on electronic-system level (ESL) design, virtual platforms and high-level synthesis (HLS).

Other new programs will address 65nm, 40nm and 28nm analog, mixed-signal and RF design methodologies while a third direction tackles multi-die packaging through 2D/3D IC design methodology, innovative silicon interposer and through silicon via (TSV) manufacturing capabilities, according to TSMC.
According to sources, the Open Innovation Platform would address system-level design's cost and complexity and enable packaging of entire electronic systems onto multi-chip packages.
TSMC revealed the OIP's global ecosystem alliance programs have presently grown to include 30 EDA partners, 38 IP partners, 23 Design Center Alliance (DCA) partners, and nine Value Chain Aggregator (VCA) partners.

TSMC is introducing a radio frequency reference design kit (RF RDK), and will shortly announce the availability of the analog/mixed-signal (AMS) reference flow 1.0, Reference Flow 11.0.

RF RDK 2.0 targets TSMC's 65nm RF CMOS process technology, accelerating analog, mixed-signal, and RF designs and RF SoC verification and integration. This resolves the challenge of performing full chip verification on SoC devices that support analog, RF, mixed signal and digital content.

The new design kits have a top-down RF design methodology and a system-level simulation flow that reduces design cycle time and encourages IP reuse. The RF RDK 2.0 is in Open Access database that supports new RF design capabilities including a circuit sizing and design centering approach, electromagnetic (EM)-aware RF simulation and analysis, custom RF inductor synthesis and modeling, and substrate noise modeling and analysis (SNA) to address the noise coupling challenges in complex mixed-signal and RF SoCs.