Synopsys primary EDA supplier for Matsushita

MOUNTAIN VIEW, USA: Synopsys Inc. announced that Matsushita Electric Industrial Co. Ltd., has signed an expanded EDA license agreement to establish Synopsys as its leading EDA supplier across the Semiconductor Company of Matsushita Electric (hereinafter called "Matsushita SC") design flow.

The expanded EDA license agreement calls for increased usage of tools throughout Synopsys' product portfolio, including the Synopsys Galaxy design platform featuring Design Compiler synthesis, Primetime timing analysis, and IC Compiler place and route technology, the Synopsys Discovery verification platform featuring the VCS and HSIM simulators for analog and digital verification, and Synopsys' design for manufacturing (DFM) portfolio including a mask synthesis solution.

The collaborative arrangement in the license agreement includes a focused initiative to optimize the design flow speed and throughput for quality SoC development. This important joint initiative is designed to enable higher engineering productivity and keep Matsushita SC at the leading edge in semiconductor development and manufacturing.

Synopsys and Matsushita SC have a long history of working together. One example of a technology that was supported by this collaboration is Synopsys' new Design Compiler Graphical product, which extends topographical technology to predict, visualize and alleviate routing congestion.

Matsushita SC is reporting early visibility and reduction of congestion when using Design Compiler Graphical, and the netlist it generates is easier to place and route in IC Compiler.

A new DFM-centric routing technology under development at Synopsys showcases another benefit of strong collaboration with Matsushita SC. In early trials, Matsushita SC has seen routing runtimes cut significantly by multi-threading support that takes advantage of the latest microprocessor multi-core architectures.