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Synopsys donates VMM library, apps

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CIOL Bureau
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MOUNTAIN VIEW, USA: Synopsys Inc. is donating its complete implementation of the proven VMM verification methodology for SystemVerilog, including the VMM Standard Library and VMM Applications, to Accellera to enable verification interoperability standardization.

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Accellera has accepted the donation so the recently formed Accellera Verification IP (VIP) Technical Subcommittee can use it for their standardization activities.

The VMM methodology, originally defined in the Verification Methodology Manual for SystemVerilog, has been used successfully by hundreds of verification teams since its introduction in 2005. Synopsys' donation to Accellera addresses customers' demand for a modular, scalable and reusable design methodology standard while enabling them to more easily develop and share complex verification environments.

Chip development teams need to have confidence that their verification methodology is mature, full-featured and scalable. One of the best ways to gain this confidence is to look for other teams who have used a methodology successfully on multiple projects. The VMM methodology has been successfully deployed by hundreds of project teams across the globe since 2005, and over 50 technical papers and tutorials on the VMM methodology have been presented at Synopsys User's Group (SNUG) meetings and other venues.

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