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India’s semiconductor ambition is beginning to take a more practical shape for startups, one prototype at a time.
Tata Electronics’ upcoming semiconductor fabrication plant in Dholera is expected to allow Indian chip startups to carry out domestic prototype tape-outs, a critical step in chip development that until now has largely depended on overseas fabs.
The update was shared by Ashwini Vaishnaw, Union Minister for Electronics and Information Technology, during an interaction with semiconductor design startups operating under the Semicon India Programme. Once operational, the Dholera fab will complement the government-run Semiconductor Laboratory (SCL), Mohali, expanding the country’s ability to support early-stage chip validation.
Why Tape-Out Access Is Critical for Chip Startup
Tape-out is the point at which a chip’s final design is sent to a fabrication unit to produce early silicon samples for testing and validation. For Indian startups, this stage has traditionally required working with foreign fabs such as TSMC or GlobalFoundries.
That reliance comes at a cost: higher expenses, longer turnaround times, and limited flexibility to iterate designs quickly.
The Dholera facility is expected to support chip designs in the 28–90 nanometre range, opening access to nodes that are far more commercially relevant than what is currently available domestically. By comparison, SCL Mohali operates at the 180 nm node, which restricts startups to older design architectures.
According to Vaishnaw, the combined coverage of Dholera and Mohali would span a significant portion of chips used in global electronics applications.
DLI Startups in Focus
The minister’s remarks followed a meeting with 24 chip design startups selected under the government’s Design Linked Incentive (DLI) scheme. Of these, 14 startups have raised around INR 430 crore in venture funding, according to government data.
At present, SCL Mohali supports startups and academic institutions through shared wafer runs. While useful for early experimentation, the facility’s ageing technology has limited its relevance for newer commercial designs.
To address this gap, the government has announced a three-year modernisation plan for SCL Mohali, backed by an investment of INR 4,500 crore.
What Comes Next for the DLI Scheme
Under the next phase of the DLI scheme, the government plans to expand support to a wider pool of fabless semiconductor startups. The focus will be on six chip categories:
Compute systems
Radio frequency
Networking
Power management
Sensors
Memory
Separately, the government reiterated its longer-term ambition of enabling domestic manufacturing of advanced chips, targeting 3 nm production by 2032, a goal that remains distant but directionally important for the ecosystem.
From Policy to Early Execution
The Dholera fab update comes as India’s semiconductor push begins to show signs of execution beyond policy frameworks.
A key milestone is Micron Technology’s ATMP facility in Gujarat’s Sanand, which is expected to begin commercial production by the end of February. The project involves an investment of up to $2.75 billion under the India Semiconductor Mission, including incentives from the central and Gujarat governments.
Construction began in mid-2023, with around 60% of Phase 1 completed by late 2024. Tata Projects is executing the build, and the facility is expected to be handed over to Micron by December 2025, after which the company will outline its production timelines.
VC Interest Remains Cautious
Despite growing policy momentum, venture capital participation in Indian semiconductor startups remains restrained.
In 2025, Indian semiconductor startups raised approximately $50 million, up from $28 million in 2024, a 79% year-on-year increase. Even so, funding levels remain modest compared to other deep tech segments.
Investors point to long development cycles, capital intensity, and limited near-term revenue visibility as structural challenges. As a result, many of the government’s largest incentives under ISM and PLI continue to flow toward established players, with startups benefiting indirectly.
That said, interest is gradually shifting toward less capital-intensive layers of the semiconductor stack, including chip design, RISC-V architectures, AI accelerators, edge computing chips, and specialised ASICs, where venture economics are more viable.
For Indian semiconductor startups, access to domestic tape-out facilities could reduce development friction at a stage where time and iteration matter most. While the Dholera fab will not solve capital constraints or market risks, it could meaningfully shorten the path from design to validation.
As India’s semiconductor strategy moves from intent to infrastructure, the real test will be whether startups can translate improved access into commercial momentum and whether investors follow.
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