SiP, an emerging alternative to SoC

MUMBAI, MAHARASHTRA: System-in-package (SiP) technology is emerging as a potential alternative to system-on-chip (SoC) technology in the semiconductor packaging industry. SiP technology attracts considerable interest because of the significantly higher flexibility it offers a design house. This flexibility allows designers to combine multiple semiconductor technologies and reuse intellectual property (IP) from numerous sources. Therefore, designers are able to overcome integration difficulties without affecting any of the individual chip technologies.

New analysis from Frost & Sullivan (http://www.semiconductors.frost.com), Analysis of World Markets and Trends for System-in-Package (SiP) Technology, reveals that these markets earned revenues of $9.31 billion in 2006 and estimates this to reach $13.40 billion in 2010.

"The ability to simplify product system board design and assembly is another strong driver for the growth of SiP technology," says Frost & Sullivan Senior Research Analyst Vinoth Praveen. "SiP technology moves the routing complexity from the motherboard to the package substrate, which results in simplified product design and reduces layer count in the motherboard."

The SiP approach offers reduced time-to-market compared to SoC, which makes it particularly suitable for wireless and consumer products. Essentially, SiP represents a feasible solution for products that have a shorter life cycle but still need to combine multiple semiconductor technologies, reuse IP from numerous design houses, and add new features rapidly.

Relative to SoC, changes to the system can be made swiftly in the SiP approach as it does not require the entire set to be changed.

However, SiP does present certain technical challenges. For instance, it is rare to source the die completely from a single company and dies obtained from different companies sometimes do not function together in a SiP environment. Thus, if a SiP fails during the testing phase of a multi-vendor business model, identifying the faulty die poses a major challenge. Supply chain issues have arisen from the need to manage both packaged and bare die from multiple vendors.

Additionally, ownership and branding of modules represent major challenges to the growth of SiP technology. For instance, in some cases, integrated device manufacturers (IDMs) put their brand name on the module even if they have only designed one or two chips in a six-chip module. The introduction of package-on-package (POP) technology will likely resolve this challenge as this allows the die to be individually packaged and separated for testing later.

Despite market challenges, the trend toward a higher level of miniaturization, integration, and enhanced performance of system products drives strong demand for SiP technology.

"In terms of unit volume, SiP has experienced wider adoption than any other previous multi-packaging technology," notes Praveen. "The continuous demand for systems and subsystems with higher functionality, improved performance, smaller size, and lower cost is fast driving SiP technology to become a viable alternative solution to SoC."