Physical Design Symposium lures researchers

PORTLAND, OREGAON: The International Symposium of Physical Design (ISPD) saw researchers and experts from various companies coming together to present new ideas and papers on physical design.

A senior manager of VLSI systems at IBM’s Austin Research Lab, Kevin Nowka, warned of challenges in physical design beyond the 22- nanometer node, which he termed as “design rule explosion”.

He emphasized that sub-wavelength lithography had made it difficult to achieve silicon image fidelity. He opined that simple technology abstractions such as rectangular shapes, Boolean rules of design and constant parameters would not be enough to improve designs to ultimate performance levels.

Nowka said that the problem of “design rule explosion” can be solved by considering the design needs at the proper levels of abstraction, such as within cells, and then balancing the area against the image fidelity.

Using examples, he illustrated how variability could be increased threefold, albeit with a small area penalty, by applying restricted design rules.

Nowka said that physical design rules beyond the 22-nm node would be more technology-aware and would employ pre-analysis and library optimization for better density and robustness.

The ISPD event which was held from March 17 to 22 in San Francisco also saw Mentor Corp’s John Park bringing forward an idea of a software/hardware co-design that could be implemented in their chips, packages and printed circuit (PC) boards.

An executive of Mentor Corp. showed an example in which all three systems were co-optimized to achieve a savings of 26 percent in costs. Park, who is the Business Development Manager for Mentor’s System Design Division, claim that pin counts, packaging costs and high speed I/O could be maximized by optimizing the interconnections between chip, package and PC board.

He said that the design flow from chip to package to pc board should be done in parallel as restraints of pc boards place requirements on the design of packages and the requirements on package design can result in chip design being constrained. Current design flow ignores both of these scenarios.

An invitation to the automobile companies to adopt EDA design methodology for on-board electronics was given by Mentor Corp’s VP for New Ventures and general manager of its Systems-Level Engineering Division, Serge Leef.

He gave figures of up to 60 Electronic Control Units (ECUs), 10 different networks for data, many megabytes of memory and lots of wiring that could be designed better by software similar to EDA.

He compared automobile software components to VLSI macros and standard cells, ECUs to physical areas on the layout onto which blocks of IC are mapped, and signal-to-frame mapping to routing of wires.

He stressed on the need for new software tools which could imitate EDA methodology , yet be maximized for providing solutions to the simultaneous constraint of components in vehicle electronics, which could analyze and optimize designs so as to reduce the number of prototype test cars.

However, keynote speaker Louis Scheffer, who was a Fellow at Cadence Design Systems  Inc. but currently works for the Howard Hughes medical Institute, gave a presentation that is considered to be among the boldest at ISPD.

He suggested the use of EDA tools to model the human brain. He cited similarities in the functions of network of neurons in the brains and in the VLSI circuitry. He said that the brain is like a network of smart sensors that behaves in both analog and digital fashion and it can be modeled with EDA tools.