More innovation required with each new generation as Moore's law goes forward

BANGALORE, INDIA: Recently, I met up with Sam Fuller, CTO, Analog Devices. In the first part, we discussed the technology aspects of Moore's Law and ‘More than Moore', among other things.

First, I asked him that as Gordon Moore has himself suggested - are we about to reach the end of Moore's Law? What will this mean for personal computing?

Fuller replied: "There is definitely still life left in Moore's law, but we're leaving the golden age after the wonderful ride that we have had for the last 40 years. We will continue to make chips denser, but it is becoming difficult to continue to improve the performance as well as lower the power and cost.

"Therefore, as Moore's law goes forward, more innovation is required with each new generation. As we move from Planer CMOS to FinFET (a new technology for multi-gate architecture of transistors); from silicon to more advanced materials Moore's law will still have life for the next decade, but we are definitely moving into its final stages.

"For personal computing, there is still a lot of innovation left before we begin to run out of ideas. There will continue to be great advances in smart phones, mobile computing and tablets because software applications are really just beginning to take advantage of the phenomenal power and capacity of today's semiconductors. The whole concept of ‘Internet of things' will also throw up plenty of new opportunities.

"As we put more and more sensors in our personal gadgets, in factories, in industries, in infrastructures, in hospitals, and in homes and in vehicles, it will open up a completely new set of applications. The huge amount of data generated out of these sensors and wirelessly connected to the Internet will feed into the big data and analytics. This would create a plethora of application innovations."

What's happening in the plane?

The plane opportunity - 90nm - 65nm - 45nm - 22nm - 20nm - 14/18nm - is starting to get difficult and probably won't work at 12nm, for purely physics reasons. What is Analog Devices' take on this?

Fuller said: "You are right! We have been going from 45 nm down to lower nodes, it'll probably go down to 10 nm, but we are beginning to run into some fundamental physics issues here. After all, it's a relatively finite number of atoms that make up the channels in these transistors. So, you're going to have to look at innovations beyond simply going down to finer dimensions.

"There are FinFETS and other ways that can help move you into the third dimension. We're getting to a point where we can put a lot of complexity and a number of functions on a single die. We have moved beyond purely digital design to having more analog and mixed signal components in the same chip. There are also options such as stacked dies and multiple dies.

"Beyond integration on a single chip, Analog Devices leads in advanced packaging technologies for System in a Package (SiP) where sensors, digital and analog/mixed signal components are all in a single package as the individual components would typically use different technology nodes and it might not be practical to do such integration on a single die.

"So, the challenge often gets described as "More than Moore", which is going beyond Moore's law, bringing those capabilities to do analog processing as well as digital and then integrating sensors for temperature sensing, pressure sensing, motion sensing and a whole range of sensors integrated for enabling the ‘Internet of Things'.

"At Analog Devices, we have the capability in analog as well as digital, and having worked for over 20 years on MEMS devices, we are particularly well positioned as we get into ‘More than Moore'."

Building transistors differently

Does it mean that the industry will be forced to build the transistors differently?

According to Sam Fuller, the industry realizes that it has about a decade left in advancing CMOS in the finer geometries. While industry is looking at ‘More than Moore' and looking at other capabilities, there is definitely research going on in alternatives to CMOS. Just like in the past, we made transitions from bipolar to NMOS and then NMOS to CMOS.

In all likelihood, there will be an alternative to today's traditional CMOS a decade from now. That could be based on Graphene or nanotubes or various TFETs. There is research going on in those and other devices based on electron spin as opposed to electron charge. The coming decade will tell us which one of them is practical and which one is not.

"I would say there is a lot of very interesting and creative work going on round the globe and we will find that there will continue to be progress after the coming 10 years."

What about 3D techniques?

Thereforre, does it also mean that the industry will start to use 3D techniques? How will this keep alive Moore's Law?

Fuller said: "Stacking silicon die does require new capabilities like the Through Silicon Via (TSV)s. At Analog Devices, we have internal capabilities for TSV now; just like transistors as we go forward TSV would get denser as we go forward. Once you have a family of TSV large dense ones for power and heat, some very fine ones for high performance signals and multiple signals you would be able to stack the die on top of each other.

"3D means stacking the dies as opposed to doing it in two dimensions. To begin with, the easiest to do would be the memory stacks and these would be seen first. As the technology develops and stabilizes for memory stacks in 3D, it can then evolve to 3D in logic and other types of System on Chip (SoC).

"If Moore's law is how much capacity and how much performance is in a single chip, then 3D will add some additional life to that."

The next part will look at industry trends.