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Mentor announces Precision RTL Plus for FPGA Synthesis

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CIOL Bureau
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WILSONVILLE, USA: Mentor Graphics Corp. announced a new product, Precision RTL Plus Synthesis, which provides a significantly improved way of designing field-programmable gate arrays (FPGAs) and dramatically increases designer productivity. The tool provides several industry-first capabilities that enable every designer, regardless of level of expertise, to reach timing closure faster, minimize the impact of late cycle design changes, and make efficient use of FPGA architectural blocks.

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The tool incorporates three innovative capabilities: multi-vendor physically aware synthesis, which unlike other physical synthesis tools, improves the design performance for a wide range of devices from multiple vendors; the industry's first incremental synthesis that is fully automatic, reducing runtime by efficiently processing late cycle design changes; and an unique resource management technology for optimized design performance. Used separately or in combination, these result in dramatically increased productivity to handle the ever-increasing design complexity.

Precision RTL Plus takes physically aware synthesis to new heights with multi-vendor support for 19 FPGA device families -- significantly broader than that supported by competing tools. This technology enables designers to reach their timing goals faster, with fewer iterations. It is a push-button, timing-driven methodology which provides an optimized netlist to the FPGA vendors' place and route (P&R) tools. It performs pre-P&R physical synthesis optimizations based on advanced delay estimation, and considers many factors including potential placement, available routing resources, and design rules specific to each device. Internal and customer testing shows a typical performance improvement ranging from 5 percent to 40 percent, with an average improvement of 10 percent.

Precision RTL Plus offers an industry-first capability of automating incremental synthesis without reducing the quality of results. It enables up to 60 percent runtime improvement, without the need for any prior planning or setup, when used with the very wide array of Precision-supported FPGA devices. The combination of the new automatic incremental synthesis and Xilinx SmartGuide flow is the industry's first complete automatic incremental design flow which takes the incremental change all the way through place and route.

Precision RTL Plus also supports the typical partition-based synthesis approach of Altera and Xilinx which can result in saving of up to 6x in run time and maximize the predictability after a design change. This can potentially mean that an iteration that previously would take an entire work day could now be done in a fraction of that time. Precision RTL Plus takes partition-based design one step further with a technology that allows the designer to recompile and synthesize only the partition affected by the design change.

The industry-first resource management technology allows the engineer to easily make trade-offs to optimize the design for either performance or area by analyzing and manipulating the mapping of dedicated FPGA blocks. The tool offers an intuitive interface that allows the user to easily identify available architectural blocks and re-map implementations for best performance and device utilization.

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