Kodak Alaris adopts SpyGlass for FPGA flow

SAN JOSE, USA: Atrenta Inc., the leading provider of SoC Realization solutions for the semiconductor and consumer electronics industries, announced that Kodak Alaris has adopted Atrenta’s SpyGlass CDC (Clock Domain Crossing) analysis tools to enhance its FPGA design and verification flow.

With this technology, Kodak Alaris has realized accuracy and productivity gains for increasingly complex FPGA designs with a growing number of asynchronous clock domains.

Kodak Alaris realized efficiencies and productivity in analyzing the RTL of their design, without the burden of analyzing the pre-defined IP blocks. They also took advantage of the easy debug across the RTL code, schematics and CDC reports from the SpyGlass platform. This was accomplished by using ‘smart models’ which allow abstraction of secured IP blocks.

With these smart models, SpyGlass CDC enables a seamless flow for designs with embedded IP blocks supplied by FPGA vendors. The models capture key clock-to-pin relationships at the boundary signals of these IP blocks, thus allowing full-chip CDC verification with no loss in accuracy and without having to delve into the internals of the IP.

The flow ensures that no CDC issues are introduced as result of incorrect IP integration, especially when some of these blocks are encrypted by the IP vendor. Additional checks from the SpyGlass platform ensure a smoother FPGA implementation.