EVE to display hardware/software co-verification tools

SANTA CLARA, USA: EVE will demonstrate its ZeBu-XXL and ZeBu-UF hardware/software co-verification solutions in Booth #116 during DesignCon 2008 February 5-6 at the Santa Clara Convention Center in Santa Clara, California.

The easy-to-use and affordable ZeBu (for Zero Bugs) family that includes ZeBu-XXL and ZeBu-UF (for Ultra Fast) combines the best aspects of traditional emulation and rapid prototyping to verify system-on-chip (SoC) design.

ZeBu-XXL is a high-capacity, high-performance system emulator used for large-scale chip and system emulation applications. It emulates designs with a speed of 20MHz at the transaction level and in in-circuit emulation (ICE) or synthesizable testbench (STB) mode. It can be configured for designs from 12.5- to 100-million ASIC gates in a compact, rack-mountable unit, or configured to accommodate up to 200-million ASIC gates through two interconnected units.

ZeBu-UF, built on an extended PCI card via a motherboard-daughtercard, maps up to six-million ASIC gates designs and executes at speeds up to 60MHz. It is ideal for block-level verification and for the system integration phase of design where multiple logic blocks and embedded software must be verified together. Hardware design and software development teams can share the same system and design representation, and can collaborate when debugging complex hardware/software interactions.