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Elpida to produce 25-nm DRAM chips in July

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CIOL Bureau
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TOKYO, JAPAN: Elpida Memory Inc., a provider of Dynamic Random Access Memory (DRAM), announced on Monday that it has developed a 2-gigabit DDR3 SDRAM using an industry-leading 25nm process for memory manufacturing.

The newly developed 25nm DRAM process technology requires 30 per cent less cell area per bit compared with Elpida's 30nm process. The chip output for a 2-gigabit DDR3 SDRAM wafer using the new process is about 30 per cent higher versus 30nm, said a press release.

Product Features

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Part Number

EDJ2104BFSE / EDJ2108BFSE

Manufacturing Proces

25nm CMOS

Memory Density

2G-bit

Data Width

x4-bit / x8-bit

Data Transfer Rate

1866Mbps and higher

Supply Voltage (VDD)

1.5V, 1.35V (Low voltage)

 Operating Case Temperature Range (TC)   0 to 95°C

By the end of 2011 Elpida also plans to begin volume production of 4-gigabit DDR3 SDRAM products using the 25nm process. Compared with the 30nm process a 44 per cent increase in chip output per wafer is expected for this 4-gigabit DDR3 product. In addition, the new 25nm process will be used to support further development of Mobile RAMTM, Elpida's mainstay memory product.

The 25nm process 2-gigabit DDR3 SDRAM can support ultra-fast performance above DDR3-1866 (1866Mbps) and is compliant with low-voltage 1.35V high-speed DDR3L-1600 (1600Mbps).

The sample shipments of new 25nm 2-gigabit DDR3 SDRAM and volume production are expected to begin in July 2011 at its Hiroshima plant, the release added.

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