3-D FPGA technology out

PORTLAND, OREGON: Zvi Or-Bach, the serial entrepreneur, has said that he has developed a 3-dimensional field-programmable gate array (FPGA) technology, which could attain the densities of an application specific integrated circuit (ASIC).

NuPGA, the new company of Or-Bach, recently presented details about the 3-dimensional FPGA technology at the Applied Materials Technical Symposium on 3-D Interconnect, held in Santa Clara, California, the Unite States.

Or-Bach, who has won the EE Times Innovator of the Year Award, has earlier pioneered ASICs at eASIC, and afterwards at Chip Express.

In 2009, Or-Bach had applied for a patent with Rice University in Houston, Texas, the United States, on a graphite-based memory process to make reprogrammable memory elements. The NuPGA is now using this process as anti-fuses for its 3-dimensional FPGAs.

The anti-fuses of NuPGA start off as an open circuit, but they can be re-programmed to produce a low-resistance connection when pulsed with a high voltage.

According to Or-Bach, arranging anti-fuses in a separate layer above logic could boost the interconnection density of FPGAs to rival ASICs. The only problem, he adds, was that the high-voltage programming transistors occupy so much room that they negate the density boost. NuPGA says it has solved this problem by burying the programming transistors in a 3-D ‘foundation’ layer beneath the traditional FPGA circuitry.