Chipsets for end-to-end designs

BANGALORE: The Indian arm of Cadence Design Systems and the Indian Institute
of Technology (IIT) Kharagpur have announced that the students of IIT
Kharagpur's VLSI Design Lab have successfully taped out complete analog, RF and
mixed-signal chipsets using the Cadence Virtuoso custom design platform. These
chipsets are targeted primarily at the communications and power supply markets.

According to the press release, the tapeouts gave IIT Kharagpur's
electronics, electrical and computer science students' invaluable experience in
end-to-end design, allowing them to translate theoretical knowledge into a real
practical chip design.

"This is a significant milestone for our VLSI lab as our students have
demonstrated their ability to translate hours of theory instruction into a
working electronic device. Their exposure to and use of Cadence's EDA technology
greatly compliments their skills," said IIT Kharagpur dean of Sponsored
Research and Industrial Consultancy, professor of Computer Science and
Engineering and the professor-in-charge of the Advanced VLSI Design Laboratory
PP Chakrabarti.

"We are committed to working with the industry to enhance and expedite
the learning process here," he added. Professor of electrical engineering
and associate professor-in-charge of the laboratory Amit Patra said,
"Cadence has been working very closely with academia and government bodies
to help grow the electronic design industry in India," said Himanshu Singh,
Executive Director, India & SAARC, Cadence Design Systems.

CyberMedia News