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APSTL developing TCSS wafers for low-cost PV cells

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CIOL Bureau
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SCOTTSDALE, USA: APSTL is developing its proprietary TCSS (thin crystalline silicon on substrate) technology to produce crystalline silicon wafers for low cost photovoltaic cells.

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Unlike the conventional processes to deposit thin films on substrates, e,g., various CVD techniques, the layer deposited by TCSS technology is crystalline, conducive to higher conversion efficiency for solar cells.

To make low cost silicon wafers for solar cells, crystalline silicon in thicknesses merely a fraction of free standing wafers, is deposited on metallic substrates. Unlike the conventional ingot route no saw loss is involved. By this process the specific silicon consumption (gm/watt–peak) for PV cells can be reduced by up to six-fold with consequent savings. The finished material can be singulated into square or rectangular wafers to replicate traditional thick poly-crystalline silicon wafers and will be compatible with current tooling for back-end processing to build modules.

Use of TCSS wafers will enable current silicon wafer based module manufacturing infrastructure around the world (3GWpy and growing) to become more cost competitive with the latest thin film technologies and thus prevent loss of investment from premature obsolescence. Moreover large investments (estimated at $20 billion) anticipated to create additional polysilicon plants to feed the need for thick silicon wafers will also become unnecessary. Looking ahead, several generations of TCSS technologies based on the core deposition process are also in the pipeline. Ultimately, continuous sheets of crystalline silicon on substrates to build large integrated PV panels will be possible.

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Rapid development of TCSS technology will help the PV industry to leapfrog current bottlenecks in ramping up of low cost modules, allow it to extend reliable crystalline silicon technology into the less than $2/watt peak segment of PV modules, and at the same time provide it with panels 50 percent more space efficient and more rugged compared to glass substrate based thin film technologies.

TCSS background

Driven by concerns on both the availability and impact of fossil fuels, the PV industry has been growing rapidly (CAGR 50 percent) over the last three or four years, and 2007 saw new PV installations jump to 3GW. At present, the predominant PV cells still use the traditional crystalline silicon in the form of thick wafers.

The silicon wafers used have crystalline atomic structure (in contrast to the amorphous structure of silicon thin films), which enables a respectable solar conversion efficiency of 15-22 percent (nearly double that of current thin film photovoltaic panels). Nevertheless, the recent surge in the PV industry has found this traditional PV technology wanting.

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Due to the discrete nature of the traditional PV technology using thick silicon wafers, building modules with it requires a lot of additional materials and assembly operations. However, a larger cost adder is the archaic process used to make the silicon wafers (cast either single or poly crystalline ingots, saw them into wafers) that involves loss of precious materials and the need to make the wafers at least 200um thick for ease of handling (when in cells using crystalline silicon just 80um thickness will suffice for maximum absorption of photons and conversion to photo electrons!).

Thus, the specific consumption of silicon by the traditional route is rather high (approx. 10 gms/watt peak). Efforts to commercialize various free-standing thin silicon wafer/ribbon technologies have seen only limited success and the traditional ingot–wafer route starting with semiconductor grade polysilicon feed still dominates the PV industry. For PV modules built with silicon crystal wafers, the input polysilicon can constitute nearly half of the total cost.

The sudden surge in demand for PV has caught the handful of polysilicon suppliers worldwide. New plants for polysilicon can cost at least $100 million per 1,000 Tpy capacity (enough to build ea. year panels to generate 100 MW) and may take two to three years to set up.

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As a result, a temporary shortage has developed in the supply of feed polysilicon and even contract price of polysilicon has doubled since 2005. Both the growth and cost reduction in the PV industry have become constrained by dependence on polysilicon.

Reaching grid parity

In order to maintain its momentum to reach grid parity ($ 0.1 per KWh), the PV industry, led by the US, is shifting emphasis to the less efficient but cheaper (by approximately 10 percent ) photovoltaic technologies employing thin films (silicon, e,g. amorphous, tandem amorphous/micro–crystalline, Cd–Te/CdS, CIS, CIGS, etc.), primarily because they require very little or no semiconductor grade silicon at all.

The thin film processes also allow integration of cells and reduction of materials & assembly operations in module production. The availability of turnkey tools developed by seasoned vendors of semiconductor/flat panel fabs is also accelerating the transition (especially to thin film silicon). However, when the cost of capital and depreciation is accounted for, these turnkey tools take a substantial chunk (approximately $0.5/watt peak) out of the cost budget.

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Development has been relatively slow for the more complex thin film formulations (compound semiconductors such as CIS, CIGS) due to yet unresolved fundamental materials science issues such as the impact of processing on non–uniformity/phase separation/defects in the deposited films and consequences on conversion efficiency.

Being a simpler material by virtue of being a single element, very well characterized due to its predominance in the semiconductor device industry, and producing conversion efficiencies 50-100 percent higher than current thin film materials, crystalline silicon is still eminently qualified to continue its leading role in the PV industry if only the shortcomings of the traditional implementation for PV cells using silicon discussed above can be eliminated.

The TCSS technology being developed by APSTL is driven by an understanding of imperfections in silicon and their effect on electron transport as well as the effect of deposition processes and crystal growth conditions on the creation of various defects.

Those interested on TCSS can contact Dr. Dev Gupta, CTO, APSTL llc, Scottsdale, AZ by e-mail at dgupta@apstl.com /

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