Altera Quartus II v13.1 delivers up to 70 percent reduction in compile times

HONG KONG: Altera Corp. announced the release of its Quartus II software version 13.1, extending its industry leadership in software productivity by delivering on average 30 percent and up to 70 percent reduction in compile times compared to the previous version, through significant algorithm optimization and increased parallelization.

The software also includes the newly available Rapid Recompile feature for customers making small source code changes on Altera Stratix V FPGA designs. With Rapid Recompile, customers can reuse previous compilation results to preserve performance, without the need for up-front design partitioning, and achieve an additional 50 percent compile time savings.

"Our Quartus II software has been able to evolve with each generation of FPGA products because of our superior and proven software architecture that was designed right the first time," said Alex Grbic, director, software and IP product marketing. "With new capabilities and enhancements to the latest version of the Quartus II software, we are delivering a 2X compile time advantage and a 20 percent performance advantage over the competition with our high-end FPGAs."