Altera FPGAs reduce SIL 3 development and certification costs for industrial designs

SAN JOSE, USA & NUREMBERG, GERMANY: Altera Corp. announced the availability of a functional safety development board and FPGA reference designs through NewTec, a leading European provider of safety-related electronic systems.

The new board and reference designs coupled with Altera’s TÜV Rheinland-qualified FPGAs, tools, and IP, enable customers to accelerate development and certification of FPGA-based system designs.

Altera’s functional safety data package includes comprehensive device support, enhanced software design flows and IP for functional safety system design, allowing customers using Cyclone FPGAs to reduce risks and cost-effectively meet safety-critical system requirements across product lines.

Functional safety, defined as the part of a system’s overall safety that depends on correct operation in response to inputs, is an important part of consumer confidence in a product.

The IEC 61508 certification ensures electrical, electronic or programmable electronic systems that carry out safety functions meet industry-standard safety guidelines, measured by the probability a system or piece of equipment will fail under certain conditions. Altera’s functional safety data package is certified up to SIL 3, which means that customers have access to Altera’s latest devices and certified tools without requiring additional certification for safety-related designs.

Altera, in conjunction with NewTec, showed how Cyclone V FPGAs with a 1oo2 SIL 3 architecture enables a safe stop in the form of a light-curtain that is attached to the functional safety board. When the light curtain is breached, for example by a human hand penetrating the light curtain, end equipment connected to the board stops in a fail-safe manner.

Altera Cyclone FPGAs and SoCs and MAX FPGAs and CPLDs enable industrial solutions that include functional safety, industrial Ethernet, motion/motor control, human machine vision and programmable logic controllers (PLCs) by accelerating algorithms in the programmable logic device hardware and reducing your time to market.