Altera opens design lab at IISc, B'lore

NEW DELHI: Altera Corporation has announced the establishment of its first FPGA/system-on-a-programmable-chip (SOPC) university development laboratory in India at the Indian Institute of Science (IISc) in Bangalore.

IISc will use the lab to conduct research in addition to giving students hands-on training on the application of FPGAs for advanced system designs. This is the first of several FPGA/SOPC digital design labs to be established in India under the Altera University Program.

In addition to providing training, the Altera University Program granted IISc a variety of development kits featuring Altera's high-density, Stratix FPGAs, as well as kits for embedded systems development using the Nios II embedded processor. The grant also includes intellectual property (IP) cores supporting emerging interface standards, digital signal processing (DSP) functions, and controllers supporting advanced DDR2 SDRAM and QDR II SRAM memory devices. The lab will also be using the Quartus II development software as well as the SOPC Builder and DSP Builder system development tools.

"This FPGA/SOPC lab will provide state-of-the-art design facilities for research and development in the area of FPGA-based embedded systems," said chairman of Center for Electronic Design and Technology (CEDT) Prof. HS Jamadagni. "The lab will also be used for training academia and the industry on FPGA and SOPC technology. The Indian Institute of Science looks forward to working together with Altera and strengthening our relationship with Altera," he added.

"Altera sees strong opportunities for growth in programmable logic in India, and is committed to working with India's strong educational system to train engineers," said Altera Asia Pacific VP and MD Ben Lee. "In the coming years, Altera will make significant contributions to advancing technical education throughout the country," he added.