Altera Cyclone III FPGAs deliver highest integration

BANGALORE, INDIA: Providing designers with the highest density FPGA per board area, Altera Corp. has announced the availability of a new 8x8 mm2 packaging (M164) for its family of 65-nm Cyclone III FPGAs. Designers of space-constrained high-volume applications in consumer, military and industrial markets can now take advantage of the combined lowest power and density leadership of the Cyclone III devices.

The 8x8 mm2 164-pin package with up to 16K logic elements (LEs) extends the Cyclone III FPGA’s high-density small-package offering that includes 14x14 mm2 256-pin (U256) and 17x17 mm2 484-pin (U484) packages. Each of these packages offers the highest amount of logic and I/Os for its footprint, allowing engineers to use FPGAs in new applications, such as handheld radios, satellite phones, I/O modules, and consumer displays.

Cyclone III devices consume 75 percent less power than competing FPGAs while delivering 5K to 120K LEs, up to 4Mbits of memory and up to 288 digital signal processing (DSP) multipliers. Further, the Cyclone III FPGA family delivers as much as 60 percent faster performance than competing low-cost FPGAs. Built on TSMC’s 65-nm Low-Power (LP) process, the Cyclone III family includes devices that are qualified for commercial, industrial and extended temperatures.

“Many designers of high-volume applications need a solution that provides maximum functionality with the lowest power while using minimal board space,” said Luanne Schirrmeister, director of marketing, low-cost products, Altera. “Our complete lineup of small packages allows designers with demanding space constraints to use the most advanced high-volume, low-power FPGA in the market.”