Alchip adopts Synopsys Eclypse low power soln

MOUNTAIN VIEW, USA & HSINCHU, TAIWAN: Synopsys Inc. and Alchip Technologies Inc., a leading fabless ASIC provider, announced that Alchip has adopted Synopsys' Eclypse Low Power Solution as their preferred low power design methodology. This is the latest milestone in the companies' history of close collaboration on high-quality, high-volume, System-on-Chip (SoC) designs.

"Synopsys has been Alchip's premier EDA vendor since the very beginning," said Johnny Shen, vice president of engineering at Alchip. "We trust Synopsys' comprehensive suite of high-performance tools and their proactive technical support to tape out our complex SoCs on time, with a solid track record of first silicon success. Nearly all of the major tapeouts in Alchip's history were designed with Synopsys design tools. With the adoption of the Synopsys low power solution flow, combined with Alchip's low power design expertise and techniques, Alchip has high confidence in our ability to address the increasing complexity of low power design and verification in 65nm and below."

Synopsys' Eclypse Low Power Solution is the industry's most comprehensive suite of proven system-level, implementation, verification, and sign-off tools, intellectual property (IP), and services for low power chip development, reducing low power design risk and turnaround time. The Eclypse solution offers a streamlined, easy-to-use low power workflow that encompasses every phase of the design process. As a result, the Eclypse solution enables design teams to adopt advanced low power techniques to meet or beat power, area, speed and yield objectives while boosting productivity, reducing risk and ultimately delivering the highest-quality silicon.

The advanced low power design techniques that customers can utilize in Eclypse flows include multi-supply voltage, multi-threshold (Vth), level shifter/ISO cell, power gating, dynamic voltage-frequency scaling (DVFS), IR analysis, static timing analysis and others.