STMicroelectronics,IBM to collaborate on chip technology

BANGALORE, INDIA: STMicroelectronics and IBM announced that the two companies have signed an agreement to collaborate on the development of next-generation process technology -- the “recipe” that is used in semiconductor development and manufacturing. 

The agreement includes 32nm and 22nm CMOS process-technology development, design enablement and advanced research adapted to the manufacturing of 300-millimeter (mm) silicon wafers. In addition, it includes both the core bulk CMOS technology and value-added derivative system-on-chip (SoC) technologies and positions both companies at the leading edge of technology development. The agreement will also include collaboration on IP development and platforms to speed the design of system-on-chip devices in these technologies.

As part of the agreement, each company will establish a technical development team at the other company’s facility. For bulk CMOS development, ST will establish a research and development team in IBM’s Semiconductor Research and Development Center in East Fishkill and Albany, New York. Simultaneously, IBM will establish an R&D team at ST’s 300mm wafer semiconductor R&D and fabrication facility in Crolles, France, where the two companies will jointly develop a variety of value-added derivative technologies, such as embedded memory and analog/RF. These technologies can be broadly applied in consumer and server markets and in wireless applications, such as cell phones and global positioning devices.

STMicroelectronics will join a partnership of semiconductor manufacturing, development and technology companies who collaborate to address the design complexity and advanced process development necessary for producing smaller, faster, more cost efficient semiconductors. Members in this six-company development network -- known as the IBM CMOS technology alliance -- benefit from early access to technology, the ability to drive technology definition, the combined research and development resources for problem solving and access to a common manufacturing base.

Similarly, IBM and ST will work together to expand the network at ST’s 300mm wafer semiconductor fabrication facility in France to include other members of IBM’s CMOS technology alliance interested in the development of value-added derivative SoC technologies.

By participating in open ecosystems that share resources among its members, companies in these technology alliances realize an increase in the speed of innovation and decrease in associated costs that result from pooling individual research and development strength and intellectual property.  As the alliances expand, the benefits from the collaborative relationships increase exponentially as more associates apply more resources to the challenge of designing and manufacturing better semiconductors, faster and cheaper.

The jointly developed processes will be ramped up into volume production at ST’s 300mm wafer semiconductor fabrication facility (Crolles, France), as well as in the Common Platform manufacturers’ 300mm facilities, which includes IBM.

With a longer-term perspective, IBM, CEA-LETI (Grenoble, France), and ST plan to work on advanced topics for future technology nodes, building on the long history of successful collaboration between the CEA-LETI public research institute and ST. Financial details relating to this deal were not disclosed.