Nios II processor core available for ASIC designs

USA: Altera Corp. and Synopsys Inc. announced that Altera's popular Nios II processor core will be available for licensing through Synopsys' DesignWare Star IP Program.

Expanding on Altera's existing FPGA and HardCopy structured ASIC product deployment options, this new offering enables Nios II users to migrate their designs to standard cell ASICs. The Nios II processor core is the most widely used FPGA-based processor, with more than 5,000 electronics manufacturers, including the world's top electronics OEMs in the customer base.

The DesignWare Star IP program provides designers access to high-performance, high-value processor and DSP cores developed by leading Star IP providers.

Utilizing its core competencies in design-for-reuse, intellectual property (IP) packaging methodologies and design flows, Synopsys will provide a configurable, fully synthesizable version of the Nios II processor core optimized for ASIC implementation. Designers will be able to use the core in the foundry and process technology of their choice.

By combining this reusable core with Synopsys' leading portfolio of tools, support, design services and additional key system-on-chip IP building blocks, Synopsys offers designers a robust solution for realizing their Nios II processor-based ASICs and ASSPs.