Advertisment

New add-on from National Instruments

author-image
CIOL Bureau
Updated On
New Update

BANGALORE, INDIA: National Instruments announced the LabVIEW FPGA IP Builder add-on, which uses Xilinx VivadoTM High-Level Synthesis technology to simplify high-performance field-programmable gate array (FPGA) algorithm design. This new LabVIEW add-on, it claims, enhances productivity by reducing the need for manual optimization of high-performance algorithms. Instead, users specify functional behavior along with design constraints and the software automatically generates a hardware implementation to meet requirements.

“Our vision for the LabVIEW platform is to empower domain experts to represent their algorithms using natural programming paradigms and provide a seamless path for deploying to high-performance hardware,” said David Fuller, vice president of applications and embedded software for NI. “High-level synthesis technology is central to this vision — it empowers system designers to spend less time optimizing their FPGA algorithms and more time innovating.” The new add-on tightly integrates with LabVIEW and the LabVIEW DSP Design Module, a LabVIEW module that helps researchers and system designers in the RF and telecommunications space quickly create communication links and multirate digital signal processing (DSP) algorithms on FPGAs.