Memoir Systems unveils Renaissance 10X

SANTA CLARA, USA: Memoir Systems, Inc., today announced the release and immediate availability of Renaissance 10X, a new family of multiport memory IP cores that increases memory performance by a factor of ten.

Renaissance 10X can generate memories with various read/write combinations for up to ten non-blocking active ports to achieve up to 10 billion memory operations per second (MOPS) in a 28nm process, said a press release.

The Renaissance product line, which also includes Renaissance 2X and 4X introduced last year, has gained traction with leading ASIC and ASSP suppliers and major OEMs. Renaissance memories are already used in high performance network switches and routers, datacenter, cloud infrastructure, software defined networking, and HD video SOCs.

Renaissance 10X is currently used by customers who need more than 480Gbps bandwidth, or clock speeds beyond 500MHz.

"Furthermore, with embedded memories accounting for over half the die area of a typical SoC today, and predictions that this will increase to 70 per cent by 2017, there is a compelling need to reduce the memory footprint and overall power dissipation."

"Emerging data communication and cloud computing applications are pushing the performance envelope. In many cases, memory performance is the gating factor," said Rich Wawrzyniak, senior analyst at Semico Research.

"Furthermore, with embedded memories accounting for over half the die area of a typical SoC today, and predictions that this will increase to 70 per cent by 2017, there is a compelling need to reduce the memory footprint and overall power dissipation," added Wawrzyniak.

Sundar Iyer, Memoir Systems' co-founder and CEO, said: "Customers tell us they are able to build high-performance, non-blocking, low latency SoC designs. The architectural flexibility of our memory platform is highly appreciated by ASIC architects who are able to realize system level features such as wire speed Netflow learning, non-blocking multicast, and very high speed measurements, while the low area and power footprint of Renaissance memories enables larger memory capacity."

Renaissance 2X, 4X, and 10X memories enable system-on-chip architects to configure memory performance to their application requirements. Memoir's IP eliminates the need to build custom multiport memories, reducing area and power requirements by up to 60 per cent compared to physical multiport implementations alone and increasing multiport memory clocks speed up to 30 per cent.

Like the Renaissance 2X and 4X memories, Renaissance 10X memories are exhaustively formally verified, and no further silicon verification is required. The memories use a standard SRAM interface, and integrate into a normal ASIC, ASSP, or SoC design flow.