Magma speeds up 65-nm customer design implementation

BANGALORE: Magma Design Automation Inc., a provider of semiconductor design software, today announced the successful tape out of a 65-nanometer, high-density, low-power integrated circuit using Blast Create, Blast Fusion and Blast Noise.

Magma said in a statement that the integrated circuit is an analog-intensive, 5-Gbps chip that was completed in less than three months. Magma's RTL-to-GDSII flow enabled Aeluros to address 65-nm design challenges and achieve timing sign-off for both the digital logic and analog interface portions of the design within a single environment and reduces the design cycle.

"We selected Magma for our first 65-nm design after achieving first-pass silicon success on a number of 0.13-micron designs," said Don Stark, vice president of engineering at Aeluros. "We needed to establish a reliable flow that could handle custom analog blocks along with standard-cell-based digital ASIC design. Magma's easy-to-use TCL interface and automated flow allowed us quickly to repeat the entire design process every time we made a change to the RTL or constraints. This was key to helping us achieve the performance we needed without having to add engineering resources."

Integrated flow addresses complexities of 65-nm while Analog IP increases productivity. A combination of 65-nm process technology and ASIC and custom designed analog circuits, the design presented several potentially time-consuming challenges. The Magma software was able to improve productivity and accelerate the design cycle, the company said in the statement.