MUMBAI:
Cadence Design Systems Inc. and ARM have announced the Cadence Functional
Verification Kit for ARM technology, presenting design teams with a low-risk
path to verification closure when verifying ARM processor-based designs.
The kit covers the verification process from architectural verification to
system validation for both hardware and software - all tied together with
Cadence's Incisive Plan-to-Closure Methodology.
A Cadence statement said “the result is improved team productivity, higher
design quality, and greater predictability in the verification process for
designers in segments such as wireless and digital personal entertainment.”
According to Mike Inglis, executive vice president of Marketing, ARM. "This kit
collaboration, using Cadence's Plan-to-Closure Methodology and
ARM-technology-certified AMBA verification IP, reinforces our commitment to
accelerate verification closure for producing industry-leading ARM
processor-based designs."
This Cadence Kit contains block-, chip-, and system-level flows and verification
methodology tailored for ARM processor-based designs using the Incisive
platform, Cadence applicability consulting, an ARM926 processor-based
representative design to demonstrate the methodologies and a full suite of ARM
technology-certified AMBA methodology-based verification IP (VIP).
The VIP includes reusable verification plans, AMBA compliance metrics, advanced
testbenches, formal and accelerated protocol assertions, accelerated transactors,
cycle-callable ARM processor models and ARM emulation LogicTiles.
AMBA methodology is an integral part of this Cadence Kit and is a widely-adopted
and open specification available for internal System-on-Chip (SoC)
communication.
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