IBM chips on a power-saving trip

NEW YORK: International Business Machines Corp said that it had developed two new chip manufacturing technologies to produce faster semiconductors that use less power, which may come onto the market in several years' time.

The company said it had created a method to combine two silicon layers that help boost performance of chip transistors made with the standard complementary metal oxide semiconductor (CMOS) technology.

IBM also said it had overcome manufacturing problems in using strained silicon directly on insulator (SSDOI) with Silicon on Germanium (SiGe), which will also help increase calculation speeds and reduce power consumption.

"These two innovative techniques are relatively simple to implement using standard wafer processing techniques," said Dr. T. C. Chen, vice president of science and technology for IBM Research, in a statement.

"Implementing either could provide the industry with higher performing and lower power chips; combining the techniques could generate even higher performance and lower power."

IBM produced transistors using ultra-thin SSDOI structures that bypass this SiGe layer, to allow for high electron mobility, while reducing process integration problems. It previously found a 20 to 30 percent performance improvement if this method could be used in commercial production.

IBM has also worked to improve CMOS performance by increasing the mobility of its positive charges, or holes, through the device channels by combining two substrates in the same wafer. This resulted in 40-percent to 65-percent better performance, the company said.

© Reuters