BANGALORE, INDIA: Power consumption is an important issue the semiconductor ecosystem is trying to address. It concerns electronic product providers across all segments.

Power management needs attention and expertise across all aspects of the design chain as it is becoming a critical product differentiator.

The tremendous growth of wireless technologies, increasing power density of wireline devices and the increased awareness of environmental regulations is making the semiconductor ecosystem take a close look at low power techniques.

Industry leaders, suppliers and customers in the semiconductor industry have joined together to address the power management issue in various forums. Significant among them is the Power Forward Initiative (PFI).

Last Thursday, semiconductor industry leaders from India gathered to discuss low power issues at an India Semiconductor Association (ISA) event held in conjunction with Cadence Design Sytems.

S.N. Padmananabhan from MindTree Consulting set the tone by talking about the fact that the need for conservation of energy has been raised by nations across the globe. He pointed out that with the purchasing-power-parity increasing in Asian countries there is an increasing consumption of electronic goods, which means an exponential increase in power consumption.

TRAI estimates that there are 90 million cell phones and 50 million landlines in India. By saving a watt each on the 140 million phones would mean saving 140 million watts. We need to reduce overall energy, peak energy and average energy.

Toshiyuki Saito from NEC Electronics, Japan, then introduced the business implications of low power consumption and how consumers are demanding feature-rich devices which expend more power and generate more heat. He said that physical design alone is not the solution as other elements of design chain have to be considered as well. Saito shared examples from NEC on successfully deployed low power techniques.

An interesting presentation from Arijit Dutta of Freescale Semiconductor on the Power Forward Initiative exhibited the advantages of using the Common Power Format (CPF) in wireless, networking and automotive verticals at Freescale. He highlighted the need for extended battery life and optimization of leakage. Dutta also shared interesting examples of power estimation, verification and budgeting.

Pankaj Mayor from Cadence Design Systems, Inc., USA, said that the introduction of CMOS in the 90s changed the landscape. As designers move to 65nm and 45nm process nodes, power consumption becomes an issue not only for the battery operated wireless world but also the wired world where the heat generated is a major concern.

Mayor said that creating electronics that consume less power requires contributions from the entire design chain and the Common Power Format is well equipped to address these. Companies like Fujitsu, TSMC, ARC and NXP are successful examples of CPF adoption.

Jayanta Lahiri pointed out that cooling and packaging are also issues that cannot be ignored. As geometries decrease chances of gate leakage increase. Lahiri discussed tackling multi-voltage issues and the addition of header/footer for energy conversions.