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Wednesday, January 31, 2007
BANGALORE: Synplicity, Inc., supplier of software for the design and verification of semiconductors, has announced the introduction of its Certify ASIC RTL prototyping software that delivers support for the Xilinx Virtex-5 family of 65-nanometer Field Programmable Gate Arrays (FPGAs).
“Based on feedback from our customers and prototyping board partners, we believe there is dramatic growth in the use of FPGA-based prototyping for ASIC verification,” said John Gallagher, director of outbound marketing, Synplicity.
Two unique partitioning features of the tool – Quick Partitioning Technology (QPT) and Certify Pin Multiplexer (CPM) – allow for shorter prototype development time and improved prototype performance. In addition, the automated DesignWare Conversion and automated Gated Clock Conversion features allow designers to use the ASIC RTL as is, without requiring manual changes.
“Our Certify software offers a comprehensive ASIC prototyping solution which eases the prototyping process, saving valuable design time and engineering resources. When used with the ultra high-performance Xilinx Virtex-5 devices, we believe designers using the Certify software will implement ASIC prototypes at higher speeds in less time,” Gallagher said.
© CIOL Bureau
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