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Enterprise > Mobility > Features
FPGA chips gaining ground over ASIC
Consumer electronics and communication are some of the segments that witness a consistent shift to FPGA
Sigi Achappa
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BANGALORE: FPGA platforms are gaining popularity over ASIC, according to Altera, a supplier of programmable solutions.

The main reason companies choose FPGA over the ASIC is because of longer design cycles in ASIC. "Due to tough competition, manufacturers cannot wait for longer design processes," said Razak Mohammedali, University Programs Manager - South Asia, Altera.

Altera’s competitor Xilinx, which recently launched the latest version of its Virtex series of programmable chips, also echoes the same view.

"Being the first to market is very important for the customer. If you are the first, you grab the bigger share of the market. It also helps them come out with multiple versions of the product quickly,"  Per Holmberg, director, programmable digital systems marketing, Xilinx recently told a press conference.

Consumer electronics and communication are some of the segments that witness a consistent shift to FPGA. Many Xilinx customers consider the requirements of a programmable chip include high performance to increase their product performance and design cycle, less power and costs, and shorter design cycle, a survey said.  

However, both companies see a longer existence for ASIC platforms. "There will always be applications that use ASIC, especially handsets that are extremely small. ASIC will exist, but will be used for high volume products,” said Mohammedali.

On Vitex 5, Holmberg said it "provides a flexible way of interfacing the FPGA to other components. Earlier there were few interfaces that were the standard; today, different proponents come with different interfaces and V5 is compliant with almost any standard. By allowing the customer to do more on the FPGA -- without high power consumption -- helps in cost reduction."

Altera’s recently launched Nios II helps embedded designers to use the same platform for both software and hardware designing. According to Mohammedali, more than 15,000 engineers work on the Nios II platform.

Nios II is simplified for wireless system design, and some of the applications being built on it include a 'wireless library' and radio cards.

High on FPGA

Emerging markets such as mobile infrastructure, broadband wireless access and Wireless LAN require high performance and bandwidth requirements. But, the DSP is slow in scaling up, failing the expectations of applications. As technology progresses, the performance need increases due to data convergence. The same device has to do more functions. 

Quoting research figures, Mohammedali said the market for FPGA for DSP will increase from $400 million to $1200 million by 2015. Although this includes both the wireless and non-wireless markets, the communication sector will drive the trend.

Altera is targeting the telecom vertical – both wireline and wireless -- as a major area for growth in the APAC. "With increased demand for wireless infrastructure, the demand for base stations is expected to go up from the current 16 million to 3.36 billion in 2015," Mohammedali said.

Local manufacturing of wireless infrastructure equipment is expected to boost the wireless market as operators roll out cheaper services. This in turn will propel the demand for access points, which is expected to touch 166 million in 2015 from the current 32 million.

With about 300-400 customers in India, Altera has witnessed 30 per cent growth over last year. The company, which faces stiff competition from Xilinx, said it has a 60:40 lead over its rival in the Indian market.

However, a Xilinx spokesperson said both the companies market share's are almost equal. 

As part of its expansion plans, Altera has tied up with various educational institutions including IITs. This offers budding developers a hands-on experience of its platforms. It has tied up with 150 universities in India and also holds an annual Nios design contest, in which about 140 students participated this year.

© CIOL Bureau
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