Best video encoder optimizes power, bit rate for video quality

BANGALORE, INDIA: A whole range of things need to be kept in mind while seecting the right video IP for SoC designs. Here, Ashwin Gayatri, Vice President – Product Engineering Services, Patni, explains the aspects an SoC designer needs to keep in mind in terms of supporting video profiles and codecs in an exclusive with Pradeep Chakraborty, Executive Editor & Head of Content, CIOL. Excerpts:

CIOL: Why is selecting the video IP for SoC designs important?

Ashwin Gayatri: Video compression/decompression is inherently very compute intensive. Video encoding is much more compute intensive than video decoding. This translates in to high power consumption. Hence, if one is looking to target the SoC with video capability for a portable device, then one needs to looks for the most optimized video IP.

If one is keen to have a video encoder on the SoC, which is required for applications like video conferencing, then the output video quality is also a very important aspect. The best video encoder is the one that optimizes the power and bitrate requirement for a given video quality.

CIOL: What should an SoC designer look for in terms of supporting video profiles and codecs?

AG: The video profiles are determined by the target application. For bandwidth and power constrained operation, as is the case of portable devices, the entry level profiles make sense. For high-end devices with mains power supply and big form factors, where viewing experience is important, the profiles at the upper end make sense.

The different codecs tradeoff quality against computational complexity and bandwidth requirements. However it may not make sense to go with some of the older codecs since one may not be able to make complete use of the capabilities offered by the newer silicon. Besides, the output quality and bandwidth requirements would make it untenable.

CIOL: What should be kept in mind while selecting/understanding video codecs?

AG: Besides some of the obvious technical considerations that have been mentioned in answer to the earlier question, there would be other considerations like royalty payments as in the case of MPEG-4 codecs.

Also, if one is targeting a player application, then an important consideration would be how much encoded content is available in the particular video format.

CIOL: At high pixel rates, what is the situation with the video subsystem?

AG: The computational complexity of a video codec increases linearly with the frame resolution and the frame rate. However, SIMD (single instruction multiple data) or MIMD (multiple instruction multiple data) implementations of video codecs can help buck the trend. But the memory subsystem needs to be designed in a way to aid this.

CIOL: Does the video performance deteriorate as off-chip memory latency increases? What can be done to improve this?

AG: The performance will certainly deteriorate as the memory latency increases. On chip memory has the least latency but would be expensive. An in between solution would be a well designed cache system.

CIOL: How can the designer control the video codec? How does API look like?

AG: The API will need to have functions for configuration of the video codec for say the frame resolution and frame rate and the output bit rate. There would be functions for initialization of the video codec. There would be functions for providing the filled input buffer as also for collecting the output buffer from the video codec.

There could also be functions for reconfiguring the video codec on the fly and for stopping or pausing it depending upon its design.