Arasan adds new products to its MIPI portfolio

SAN JOSE, USA: Arasan Chip Systems has announced the availability of MIPI LLI controller IP along with a matching Type 1 M-PHY. The company is a total IP solutions provider and this is the latest addition to its prominent MIPI portfolio.

Although both the Applications Processor and the Baseband Processor for mobile platforms are complex SOC's, the two chips are often integrated into one SoC by a number of chip vendors. Most of the high end mobile chipsets are still split into two separate processors.

Inorder to allow efficient cache refills, each have their own system level memory. LLI, which is a chip-to-chip link layer interconnect protocol, allows efficient , low-latency cache refills from the DRAM associated with a companion chip. It removes the need for two separate sets of DRAM's and reduces the cost of the mobile platforms.

LLI requires M-PHY Type 1 as the physical layer. Arasan has developed a combined LLI controller and M-PHY Type 1 solution. It can be configured for a variety of host buses (like AHB, AXI and OCP), and bandwidth/latency requirements across multiple traffic classes. Customers are given a choice of either source synchronous or independent clocking in the M-PHY's for clock and data recovery mechanisms in the analog receivers.