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Altos Design Automation launches Variety MX

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CIOL Bureau
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PARIS, FRANCE: Altos Design Automation Incorporated, the library characterization company, based in Santa Clara, California, the United States, has launched Variety MX, which it claims is a fast, accurate statistical timing model generator for embedded memories.

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The company said in a press release that the Variety MX tool makes use of technology from Liberate MX to perform automatic probing and dynamic partitioning to address the runtime and accuracy challenges which come up from statistical characterization of large-sized macro-blocks that usually consist of millions of transistors.

According to Altos Design Automation, Variety MX uses ‘dynamic partitioning’ – partitioning based on a full chip simulation of a circuit using a ‘fast-spice’ simulator. This approach, the company explained, has the benefit of being able to account for effects that are common at advanced process nodes such as interconnect coupling, power supply gating, as well as transistor stress.

Altos Design Automation says that ‘dynamic partitions’ are small and so they can be considered as a ‘true-spice’ simulator providing highly accurate results.

Variety MX, according to Altos Design Automation, generates instance-specific Liberty models for use by the Encounter Timing System GXL of Cadence, the Goldtime of Extreme DA, and the PrimeTime VX of Synopsys.

Altos said Variety MX has been adopted by STARC since its STARCAD-CEL 3.0 flow could not perform statistical timing analysis on critical paths which have embedded memory.

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