IBM-led Alliance develops 32nm high-k/metal gate SRAM

IBM-led Alliance develops 32nm high-k/metal gate SRAM

Smaller, faster more power-efficient 32nm semiconductors span low-power consumer devices, high-performance computing

Tuesday, December 11, 2007

"IBM’s alliances have demonstrated the "high-k gate-first" approach in a manufacturing environment, an achievement that provides clients with a simple, scalable pathway to incorporating the high k material innovation in semiconductor development without introducing additional design complexity," said Gary Patton, vice president, IBM's Semiconductor R&D Center on behalf of IBM's technology alliances. "This industry leading development comes from leveraging the collective engineering talent and breadth of market experience across the six Alliance Partner companies, as well as world class R&D facilities such as UAlbany NanoCollege’s Albany NanoTech complex, in order to maintain an aggressive road map.”

IBM and its Alliance Partners have developed low-power foundry Complementary Metal Oxide Semiconductor (CMOS) technology using the 'high-k gate-first' approach and have demonstrated the first 32nm ultra dense static random access memory (SRAM) in this low power technology with cell sizes below 0.15um².

SRAMs are a key building block of computer chip designs and an excellent indicator of the readiness of a technology. The unique characteristics of the high-k material reduces total chip power consumption by as much as a 45 percent compared to the previous generation, a critical technology factor for achieving longer battery life in hand held devices such as cell phones, pagers, and PDAs.

In addition, IBM and its Alliance Partners have incorporated the high-k innovation into a new generation of high performance Silicon-On-Insulator (SOI) technology at 32nm. The unique high-k material properties enable a transistor speed improvement of greater than 30 percent over the previous generation of high performance Silicon-On-Insulator (SOI) technology.

The SRAM demonstrated in this new generation of high performance technology functions at a lower voltage -- an improvement that reduces the energy consumption for microprocessor applications. The use of SOI provides a significant performance and power benefit, which, in combination with the high-k/metal gate advancement, will help the technology deliver energy efficient chips used in applications such as games, personal computers, and high end computing systems.

The announcement marks the latest development achievement from this alliance of semiconductor manufacturing, development and technology companies that collaborate to address the product design and advanced process development challenges central to producing a smaller, faster, more cost efficient generation of semiconductors.

©CIOL Bureau

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