SAN JOSE, USA: Xilinx has introduced the next generation in the company's flagship high-performance Virtex and low-cost Spartan field programmable gate arrays (FPGAs), the foundation for a new generation of 'targeted design platforms' that will enable system designers to increase productivity and minimize development costs.

With programmability increasingly becoming an imperative to electronic manufacturers' ability to keep their innovative edge under challenging business and technological environments, these new targeted design platforms from Xilinx and its network of third parties will provide system designers with simpler, smarter and more strategically viable methodologies for creating FPGA-based system-on-chip solutions targeting a wide variety of markets and applications.

The Virtex-6 and Spartan-6 FPGA families build upon 25 years of Xilinx market and technology leadership with over 10 generations of FPGAs. These new families exploit the performance and cost benefits of proven advanced process technologies from UMC and new foundry partner Samsung to meet the insatiable global demand for higher bandwidth and greater performance at lower costs with less power for myriad end markets, ranging from automotive, consumer and wired/wireless communications to aerospace and defense.

"We are reaching the tipping point at which FPGAs become the prevailing silicon platform of choice for electronic manufacturers who need customization to differentiate their products, but are faced with incredibly unattractive ASIC development costs," said Moshe Gavrielov, Xilinx president and CEO. "But in order for customers to increase their adoption of FPGAs, it's essential that we provide a comprehensive design environment that enables global design teams to address the 'programmable imperative' and deliver products faster under these challenging economic and business conditions."

Programmable imperative
As Moore's law continues to deliver the benefits of higher chip density and performance along with the challenges of increased development and manufacturing complexity, the industry is seeing increasing adoption of FPGAs for next-generation system designs in lieu of traditional application-specific integrated circuits (ASICs) and application-specific standard parts (ASSPs).

In fact, Gartner Inc. predicts the ratio of FPGA designs to ASIC designs was about 25 to 1 in 2008, highlighting a programmable imperative trend that the research firm expects to continue for the foreseeable future.

"Platform design is the wave of the future," said Bryan Lewis, Semiconductor Research VP for Gartner. "Design reuse, time to market, and risk management are of top importance to system designers in general and especially in this troubled economy. Platform design brings clear benefit to the market while controlling the cost for both chip suppliers and system designers."

Addressing the programmable imperative requires a two-fold commitment. The first is delivering programmable silicon innovations that supply industry-leading value for every key figure of merit against which FPGAs are measured (price, power, performance, density, features, and programmability). The second is to provide the people who build electronic systems with tools, methodologies and IP for enabling FPGAs to deliver on their promise of fast-time-to-market and flexibility.

Targeted design platform
The Xilinx targeted design platform strategy encompasses the integration of five key elements:
* New Xilinx Virtex-6 and Spartan-6 FPGAs.
* Design environments supporting and integrating industry-proven methodologies.
* Scalable boards and kits adopting the industry standard FPGA Mezzanine Connector.
* Socketable intellectual property (IP) cores.
* Robust reference designs.

Each one of the elements, excluding the Xilinx FPGA device, is delivered by Xilinx or its third-party network and is supported by a robust ecosystem of design service expertise. Targeted design platforms enable software and hardware designers alike to leverage open standards, common design methodologies, development tools, and run-time platforms. This allows designers to spend less time developing the infrastructure of an application and more time building differentiating features into the end application.

Xilinx Virtex-6 and Spartan-6 FPGA families
The mix of programmable logic and configurable hard IP built using the latest process technologies from UMC and Samsung enables Virtex-6 and Spartan-6 FPGAs to deliver twice the capacity at half the power consumption compared to previous families. Xilinx uses multiple foundries to provide the best technical solution for its customers.

Both foundries are aligned with Xilinx's strategy to optimize for power, performance, and cost and are recognized by the industry as proven manufacturers with well-established, low power, and advanced process technology.

With up to 760K logic density and more than 38Mbit of BlockRAM and 2,000 DSP slices, these new Xilinx devices set new benchmarks in on-chip performance. In addition, the new families offer up to 64 GTH transceivers that run up to 11.2 Gbps, enabling support for OTU (optical transport unit) specifications for the optical transport market, PCI Express-compliant hard blocks supporting root port functionality, and dedicated DDR3 memory controllers.

These features help design teams keep up with the demands of bringing systems together, whether over a backplane, across fiber or copper, chip-to-chip, or connected to the latest high-speed memories available. With the new device families, system designers can also take advantage of more than 100 IP cores and reference designs across Xilinx FPGA families and development platforms.