LONDON, UK: Micron Technologies Incorporated, based in Boise, Idaho, the United States, has launched a multi-chip package (MCP) memory for smart phones, mobile Internet devices (MIDs), and personal media players.

The new multi-chip package memory includes a 4-Gbit NAND flash memory die and as also a 2-Gbit low-power DDR die.

While the 4-Gbit NAND flash memory is implemented in 34-nm process technology, the DRAM is implemented in a 50-nm process.

In a statement, Micron Technologies said the new memory, which being sampled to early customers, will be mass-produced early in 2010.

The multi-chip package (MCP) memory can support up to 8-Gbits of NAND and 8-Gbits of LPDDR by including additional die, but without enhancing the size of the package.

Eric Spanneut, Micron Technologies’ director of mobile memory marketing, said in the statement that the 50-nm 2-Gbit LPDDR monolithic die and the 34-nm 4-Gbit NAND used in the a multi-chip package (MCP) give the customers “the most advanced solution available in NAND-based MCPs.”

Micron Technologies, he added, has combined the leading NAND and DRAM processes available in the industry in its new generation of multi-chip packages. And, the company could “easily accommodate the shift to high-density NAND devices” as the industry is heading for multi-function mobile devices.

Besides the multi-chip package (MCP) range, Micron Technologies offers discrete NAND and LPDRAM parts, as well as NANDcode software.