Altera starts shipping 40-nm Stratix IV FPGAs

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Altera starts shipping 40-nm Stratix IV FPGAs

Industry's most advanced FPGAs provide an unprecedented level of density, performance, and system bandwidth, all at lowest power for high-end FPGAs

Tuesday, December 16, 2008

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SAN JOSE, USA: Altera Corp. announced silicon availability of the industry's first 40-nm FPGAs. Targeting customers in a variety of markets, including communications, broadcast, test, medical and military, Stratix IV FPGAs offer the industry's largest density, highest performance, highest system bandwidth and lowest power among high-end FPGA solutions. The first device available is the EP4SGX230, offering 230K logic elements (LEs), 36 embedded transceivers operating up to 8.5 Gbps, 17 Mbits of RAM and 1,288 embedded multipliers.

Altera's industry's first 40-nm FPGAs

Leveraging the 40-nm process node, the Stratix IV FPGA family is comprised of two variants, an enhanced (E) version and transceiver-based (GX) version. The Stratix IV family offers up to 680K logic elements, over twice the logic capacity of competing high-end FPGAs, as well as performance that is 35 percent faster than competing solutions. The devices also support DDR3 memory interface speeds of 1067 Mbps. Stratix IV GX FPGAs feature up to 48 transceivers operating up to 8.5 Gbps, enabling the development of next-generation, high-bandwidth communication infrastructure.

"LeCroy selects FPGA devices that offer the highest speeds and gate counts to enable a rich set of product features to our customers," said Jim Roth, vice president, PSG marketing, LeCroy. "The Stratix IV GX device's high-speed transceivers and memory interfaces, coupled with its high gate and I/O count, enable LeCroy to develop next-generation protocol test tools with industry-leading performance and feature sets."

Lowest power high-end FPGA
Featuring the industry's most advanced logic and routing architecture, and Altera's innovative Programmable Power Technology, the Stratix IV family is the industry's lowest power, high-end FPGA. Programmable Power Technology enables every programmable logic array block (LAB), digital signal processing (DSP) block, and memory block to deliver high speed or low power, depending on design requirements. With this power-saving technology, customers can minimize power usage, while maximizing device performance. For additional cost and power savings, Stratix IV FPGAs provide customers a conversion to Altera's transceiver-based HardCopy IV GX ASICs.

Broad protocol support
Stratix IV GX FPGAs incorporate up to four hard intellectual property (IP) cores for PCIe Gen1 and Gen2 (x1, x4 and x8), and also support a wide range of protocols including Serial RapidIO, Gigabit Ethernet, XAUI, CPRI (including 6G CPRI), CEI 6G, GPON, SFI-5.1 and Interlaken. Stratix IV GX devices are the only FPGAs that meet the rigorous jitter specifications of protocols like PCIe Gen2 and CEI 6G (critical for Interlaken).

"The response we have received since announcing the industry's first 40-nm FPGAs has been exceptional," said David Greenfield, Altera's senior director of high-end products. "With their impressive data rate, bandwidth and data processing capability, Stratix IV GX FPGAs are clearly an enabling technology that will drive the evolution of next-generation markets, such as video over IP, 4G wireless and digital TV."

©CIOL Bureau

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