The technology is competing against Cadence’s Virtuoso tools. Unfortunately, when end-users call up an iPDK at a customer site, a warning message automatically pops up. It reads: “WARNING* (DB-220704): The usage of non-SKILL Pcells in Virtuoso is not a supported feature.”

This is causing a certain level of confusion among customers and the IPL group claims that Cadence is to blame. They have put forward the demand that Cadence remove the message.

Sources say that the warning message began to appear when Virtuoso IC6.1.3 was first released. They say this is misleading information, since all of their tests show that all iPDKs work in Cadence Virtuoso 6.x. They affirm that the Python PCells (PyCells) in iPDK use the same OpenAccess PCell plug-in mechanism used by Cadence SKILL PCells and these have proven to be completely interoperable. PyCells work correctly and yield the same results in Virtuoso, Custom Designer, Titan, and Laker say sources.

A PDK is a set of technologies that enable a complete analog and mixed-signal design flow – and comprise of foundry-verified data files, such as schematic symbols, component descriptions, parameterized cells (p-cells) and callbacks.

The IPL Alliance was started in 2007, with five founding members: AWR, Ciranova, SpringSoft, Silicon Navigator and Synopsys. Mentor Graphics and Pulsic joined as supporting members. The newest members to have joined are: TSMC, Helic, JEDAT, Magma, Micro Magic and Virage Logic; LFoundry, TowerJazz and others joined the group very recently.

The EDA vendor Cadence has not joined this alliance – and says that the IPL-backed flow is a competitive threat to its analog EDA tool suite, the Virtuoso. Presently, Cadence is the big player in the EDA field, and IPL is attempting to break Cadence’s monopoly in custom design.