MOUNTAIN VIEW, USA: Synopsys Inc. announced the qualification and immediate availability of Synopsys' IC compiler for designs targeting TSMC's latest 45-nanometer process.

The qualification by TSMC offers designers an assured path to design- rule-correct physical implementation. Multiple 45nm designs utilizing IC compiler with TSMC technology are already underway. The IC compiler qualification validates compatibility with TSMC's process technology requirements.

The IC compiler is Synopsys' technology-leading, comprehensive place-and-route solution in broad use today across a wide range of end-user applications and technology nodes. TSMC's qualification focuses on adherence to routing rules, which are one of the biggest variants in the transition from one silicon technology to another.

The qualification process validates routing across multiple 45nm test cases with utilizations up to 85 percent. The router must obey design for manufacturability (DFM) constraints, such as double-via cuts, and must produce a 100-percent design-rule-correct result, validated by the sign-off physical verification technology employed by TSMC.