Multi-Processor system on chip from Dresden

MUNICH, GERMANY: Researchers and chip designers from the Dresden Technical University are fast readying a solution for the challenge of modem signal processing for upcoming wireless communications generations. The new project, being showcased at the high profile Design Automation Conference (DAC) in San Francisco, is seen as addressing the various challenges posed by upcoming cellular standards such as 3GPP,LTE and WiMAX.

An industry source said that researchers have given shape to a chip christened Tomahawk. The heterogeneous MPSoC (Multi-Processor System on Chip) introduced embraces two Tensilica Xtensa control processors, eight vector fixed-point DSPs and two scalar floating-point DSPs on a 10 mm by 10mm die. The key component of the device however is the CoreManager, a dedicated hardware scheduler, pointed out the report.

“The Dresden TU innovation is easy to program, according to a report quoting Professor Gerhard Fettweis who manages the Dresden Technical University Vodafone chair. "Tomahawk proves that we power consumption can be lower by a factor of 10 compared to today's low energy concepts. The chip design which embraces some 60 million transistors, is very power efficient,” Fettweis said.

The device has been designed using a proprietary Synchronous Transfer Architecture design template.

The scientist has added that the challenges associated with the design of such a complex hardware-software continuum are about to trigger major efforts to develop adequate design tools in the EDA industry.

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