SANTA CLARA & ALBANY, USA: IBM Corp., Applied Materials Inc. and the College of Nanoscale Science and Engineering (CNSE) of the University at Albany (UAlbany NanoCollege) announced an agreement to jointly develop process modeling technology for manufacturing 22nm logic and memory chips.

The project will combine IBM’s semiconductor technology research and development leadership and computer modeling expertise with Applied’s semiconductor processing knowledge to develop predictive models that can help minimize process variation, reduce development cost, and improve time to market for 22nm semiconductors.

FinFET transistors, vertical transistors with fin-shaped silicon channels, will be used to validate the technology. FinFETs are considered a potential successor to conventional planar transistors for 22nm chips.

Today’s most advanced semiconductors have circuitry at 45 nanometers and larger. Producing circuits at 22nm becomes more challenging since current lithography methods, the process for creating circuit patterns on silicon wafers, present physical limitations for critical chip layers. To help overcome these limitations, IBM has led an initiative known as Computational Scaling. Computational-based processes developed by IBM use advanced mathematical techniques, software tools and high-performance computing systems to enable the production of complex, powerful and energy-efficient semiconductors at 22 nanometers and beyond.

“IBM pioneered the use of high-performance computing and predictive modeling to overcome the physical limitations of optical lithography,” said Gary Patton, vice president, IBM Semiconductor Research and Development Center. “To meet the challenges of 22nm, we need to model the entire physical structure of the transistor, and this is now possible with the advent of ultra-powerful, petascale computer processing. By combining Applied’s thin film deposition and etch processing expertise and CNSE’s fundamental science know-how with IBM’s capabilities, we can extend our modeling beyond lithography to help deliver a more complete and validated manufacturing process.”

IBM brings to the collaboration more than 50 years of semiconductor technology experience and a proven track record of technology development and manufacturing that can help accelerate development of 22nm technology and beyond. End-to-end integration, from design to manufacturing to characterization and test, gives IBM the ability to leverage process insights for outstanding modeling and excellent results in hardware.

Developing a chip manufacturing process for a new technology node involves complex interactions among multiple process variables, fabrication disciplines, and circuit requirements. With circuit features just a few hundred atoms across, the interactions of each process variable must be taken into account. For advanced technology nodes, this can lead to costly production experiments that consume many thousands of semiconductor wafers. The goal is to develop computational models to perform most of these experiments in a “virtual” laboratory, greatly reducing the need for actual wafer processing.

“The next big scaling challenge is to give these ultra-small transistors consistent geometry and electrical properties which define the speed, reliability and power consumption of a device,” said Hans Stork, Group Vice President and Chief Technology Officer of Applied’s Silicon Systems Group. “The key to reducing this variability is to integrate and optimize every fabrication step to precisely construct and repeat the critical transistor geometry. By using Applied’s process knowledge to validate and refine IBM’s predictive modeling, we plan to bring this new technology to market in a shorter time, with less risk and at a lower development cost than traditional experimental methods.”

Applied has production-proven processing systems and a wealth of technology expertise covering the additional steps that are to be included in the FinFET model. Applied’s award-winning Producer® APF™ and Producer PECVD systems will deposit the Advanced Patterning Film (APF), oxide and nitride hard mask layers with tunable thickness, density, reflectivity and stress, while the Applied Centura Enabler and AdvantEdge etch systems offer closed-loop CD trim, and optimum etch rate and selectivity for excellent global profile control and CD uniformity.

“The UAlbany NanoCollege looks forward to building on our relationship with IBM and Applied Materials for the development of leading-edge process modeling methods that are critical for the development and manufacturing of 22nm chips,” said Richard Brilla, Vice President for Strategy, Alliances and Consortia at CNSE. “This collaboration will extend current research at CNSE’s Albany NanoTech to validate fundamental process modeling work for future technology nodes, accelerating the integration of advanced processing and innovative nanoelectronics research and development that is necessary for scaling amid the growing complexity of next-generation transistors.”

The research will be carried out primarily at CNSE’s Albany NanoTech Complex in Albany, NY, where Applied has a full suite of leading-edge processing tools and a staff of engineers and scientists. Additional modeling and process characterization will be performed at IBM’s facilities in East Fishkill and Yorktown, NY, Applied’s Maydan Technology Center in Sunnyvale, CA and the Computational Center for Nanotechnology Innovations (CCNI) at the Rensselaer Polytechnic Institute in Troy, NY.