Tanner EDA launches version 15 of its HiPer Silicon

Tanner EDA launches version 15 of its HiPer Silicon

Tanner EDA said it focused to offer a comprehensive analog design flow from schematic capture, circuit simulation and waveform probing to physical layout and verification

Thursday, May 06, 2010

PARIS: Tanner EDA has launched version 15 of its HiPer Silicon full-flow design suite that is claimed to consist of a latest database for simulation data, a waveform viewer, an improved signal analysis platform and a tool for device and structure generation. Tanner EDA said it focused to offer a comprehensive analog design flow from schematic capture, circuit simulation and waveform probing to physical layout and verification.

Amongst other enhancements, Tanner EDA outlined a redesign of the waveform editor product, W-Edict, to present designers with a signal analysis platform rather than easy layout views. HiPer Silicon v15 in addition includes a database for the storage and management of simulation data. The third improvement is HiPer DevGen, a tool that enables device and structure generation for layout output.

Developed in conjunction with IC Mask Design, HiPer DevGen concentrates on silicon quality and yield to produce production-ready devices.

Ciaran Whyte, IC Mask founder & CTO at Tanner EDA stated that "Our aim was to produce a tough tool that could create a layout of high quality whilst at the same time reducing the cycle time,”

The company said HiPer Silicon v15 and the HiPer DevGen add-on are presented for the Windows operating system. Linux versions are anticipated to be obtainable in the second quarter of the year 2010.

©CIOL Bureau

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