BANGALORE, INDIA: EDA plays a major role as far as chip designing is concerned. With India's growing might in semiconductors, the EDA companies in India are witnessing consumption rising than ever before.

In an exclusive with CIOL, Rahul Arya, Marketing Director, Cadence Design Systems (I) Pvt. Ltd, touches upon how the industry has been performing, and how are the EDA companies addressing the design challenges. Excerpts:

CIOL: How is the EDA industry doing today globally?

RAHUL ARYA: The size of the EDA market worldwide is estimated to be about US$ 5bn. The top three EDA companies -- Cadence, Mentor and Synopsys -- command three-quarters share of the entire EDA market worldwide.

Following the semiconductor industry trends, we see that the consumption of EDA technologies is growing in regions outside of the US and Europe.

CIOL: What is the status of the EDA industry in India?

RA: It is a pretty good reflection of what's happening worldwide. It's growing and it's healthy. As per the ISA F&S Report 2005, the EDA market in India was US$110m.

The reasons for growth are multiple. Our customers are growing and hence, so are we. With all of the major semiconductor MNCs having expanded their footprints by setting up India design centers, more EDA software is getting consumed in India. Indian design services are also growing. Also, some startups are coming up, like Cosmic Circuits, Sankalp, etc., and they are gaining momentum.

CIOL: How are 45nm (and 32nm) design challenges being handled?

RA: Even if you look at the work being done in India, it's pretty cutting edge, comparable to the rest of the world. Our customers are looking for the 3Cs -- complexity, cost and convergence. The end users are asking for more features. For example, in their mobile or any other electronic device, which is driving our customers to pack in more functionality on the chips.

Our customers have multiple challenges at 45nm and below, notably low power, analog-mixed signal and Design for Manufacturing (DFM).

As the industry pushes toward smaller process geometries, the existing design infrastructure must be upgraded holistically to automate power-lowering design techniques. Most power-control methods in use today are manual and implemented ad hoc, leading to an increased risk and cost. Across the design and manufacturing chain, an urgent need has emerged for an automated, power-aware design infrastructure. To facilitate and support a new era of low-power design innovation, Cadence has formed the Power Forward Initiative (PFI).

Drawing from the collective expertise of leading technology companies, the Power Forward Initiative will create a more systematic, integrated approach to low-power design, providing a platform for higher-level exploration and IP re-use. Power Forward Initiative members are already at work on validating the Common Power Format (CPF), a new open specification language that captures all power-specific design, constraint, and functionality requirements, such as multi-supply voltage and power shutoff, in a single file.

By linking design, verification, and implementation domains, the Common Power Format enables automation of power-reduction techniques and increases predictability. No longer constrained by the risk of low yield or costly re-spins, design teams can focus their time and resources on what matters most — innovation. Achieving both functional and structural verification before incurring manufacturing costs, and with greater time-to-market opportunities, companies across the design and manufacturing chain can adopt new process geometries and start low-power design projects profitably.

CIOL: Since you mentioned DFM, how is the yield getting improved?

RA: Cadence is trying to bring lot of analysis early in the cycle. The designer has more visibility on those effects, before they get manufactured. We have a host of technology offerings to enable the designers make early decisions.

For example, Cadence has worked with TSMC on 9.0 reference flow. We've also worked with ARM on a low-power methodology. The idea is industry-wide collaboration will ensue we are able to provide value to customers.

CIOL: What is the way forward for the EDA industry?

RA: As our customers grapple with technology and time to market challenges, EDA industry will be the DNA of growth.