Mistral launches an FPGA-based Radar Receiver

Mistral launches an FPGA-based Radar Receiver

The Radar Receiver is built around a Virtex-5 FPGA based processing engine with powerful processing and high bandwidtH

Thursday, December 24, 2009

BENGLURU: Mistral Solutions has announced the availability of its Radar Receiver to meet the demanding requirements of the aerospace and defense applications. The Radar Receiver, named 'SaraAmsh', is a 1U form-factor, 19 inch sub-rack mountable, compact unit, with an eight-channel receiver that supports direct IF sampling.

The Radar Receiver is built around a Virtex-5 FPGA based processing engine with powerful processing and high bandwidth features that make it ideal for DSP applications including signal intelligence, electronic warfare and counter measures.

“The Radar Receiver designed by Mistral is unique as compared to most other COTS boards available in the market. It integrates multiple ADCs, FPGA processing engines, single board computer and various serial and parallel industry standard interfaces, to provide customers a complete solution. Customers can focus on their end-application instead of spending valuable time integrating multiple COTS boards available in the market to build their own radar receiver solution,” said A Venkatakrishna, VP-Hardware Design, Mistral Solutions.

“One of the important requirements users look for in a radar receiver is the synchronization between channels, and Mistral's Radar Receiver has been architected to achieve this,” he added.

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